Hi Conor,
On 12/11/22 14:34, Conor Dooley wrote:
From: Conor Dooley
The system controller on PolarFire SoC is access via a mailbox. The
control registers for this mailbox lie in the "IOSCB" region & the
interrupt is cleared via write to the "SYSREG" region. It also has a
QSPI controller, usual
(-)
Reviewed-by: Philippe Mathieu-Daudé
On 11/11/22 19:25, Alex Bennée wrote:
We can derive the correct CPU from CPUARMState so lets not rely on
current_cpu.
Signed-off-by: Alex Bennée
---
hw/arm/pxa2xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
Bennée
---
target/microblaze/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
---
target/sparc/mmu_helper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 12/11/22 06:50, Richard Henderson wrote:
On 11/12/22 04:25, Alex Bennée wrote:
This is simulating a bus master writing data back into system memory.
Mark it as such.
Signed-off-by: Alex Bennée
---
hw/audio/intel-hda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw
On 11/11/22 19:25, Alex Bennée wrote:
This allows us to drop the current_cpu hack and properly model an
invalid access to the vapic.
Signed-off-by: Alex Bennée
---
hw/i386/kvmvapic.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/hw/i386/kvmvapic.c b
On 11/11/22 19:25, Alex Bennée wrote:
Some of the callbacks need a CPUState so extend the interface so we
can pass that down rather than relying on current_cpu hacks.
Signed-off-by: Alex Bennée
---
include/hw/isa/apm.h | 2 +-
hw/acpi/ich9.c | 1 -
hw/acpi/piix4.c | 2 +-
hw/
(Markus)
v2: The property is changed to smp-cpus since 5.0 (Phild)
---
qapi/qom.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
On 14/11/22 11:34, Frédéric Pétrot wrote:
Le 14/11/2022 à 09:40, Philippe Mathieu-Daudé a écrit :
On 11/11/22 13:19, Frédéric Pétrot wrote:
Eventually we could unify the style:
-- >8 --
@@ -476,11 +476,11 @@ DeviceState *sifive_plic_create(hwaddr addr,
char *hart_con
ennée
Reviewed-by: Philippe Mathieu-Daudé
With this patch, the evb_sdk test fails:
Fetching asset from
./build/arm-clang/tests/avocado/machine_aspeed.py:AST2x00MachineSDK.test_arm_ast2500_evb_sdk
JOB ID : 542e050c4f7e1ddd6d5cdd350e4c26e1bdfcdee4
JOB LOG:
/home/petmay01/avocado/job-result
onnect_gpio_out(dev, cpu_num,
+qdev_connect_gpio_out(dev, cpu_num - hartid_base,
qdev_get_gpio_in(DEVICE(cpu),
IRQ_S_EXT));
}
}
---
Reviewed-by: Philippe Mathieu-Daudé
Hi Stefan,
On 14/11/22 22:56, Stefan Hajnoczi wrote:
Hi Alex and Richard,
The aarch64 GitLab CI runner is down again. Are you able to restart it?
Alex wrote to your RH account :/ This is a scheduled shutdown.
Equinix is relocating the hardware and this runner will be down
for (at least) 4 days
Hi,
As of v7.2.0-rc0 I am getting:
(101/198)
tests/avocado/machine_s390_ccw_virtio.py:S390CCWVirtioMachine.test_s390x_fedora:
FAIL (23.51 s)
$ cat
test-results/101-tests_avocado_machine_s390_ccw_virtio.py_S390CCWVirtioMachine.test_s390x_fedora/debug.log
01:20:44 INFO | INIT 1-S390CCWVirti
170 | qemu_set_info_str(&s->nc, "");
Signed-off-by: Stefan Weil
---
include/net/net.h | 3 ++-
net/socket.c | 2 +-
net/stream.c | 6 +++---
3 files changed, 6 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 15/11/22 12:05, Thomas Huth wrote:
On 15/11/2022 12.03, Philippe Mathieu-Daudé wrote:
Hi,
As of v7.2.0-rc0 I am getting:
(101/198)
tests/avocado/machine_s390_ccw_virtio.py:S390CCWVirtioMachine.test_s390x_fedora: FAIL (23.51 s)
Is it 100% reproducible? ... the test is known to be a
On 10/11/22 21:50, Stefan Hajnoczi wrote:
Preventing this class of bugs is important but QEMU is currently
frozen for the 7.2 release. I'm a little concerned about regressions
in a patch series that changes core device emulation code.
I'm waiting for Alex's MemTxRequesterType field addition in
On 14/11/22 18:19, Peter Maydell wrote:
On Sun, 23 Oct 2022 at 16:37, wrote:
From: Tobias Röhmel
ARMv8-R AArch32 CPUs behave as if TTBCR.EAE is always 1 even
tough they don't have the TTBCR register.
See ARM Architecture Reference Manual Supplement - ARMv8, for the ARMv8-R
AArch32 architectu
On 15/11/22 12:56, Xiaojuan Yang wrote:
Add cfi01 pflash device for LoongArch virt machine
So the subject prefix should be "hw/loongarch/virt:".
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/Kconfig| 1 +
hw/loongarch/acpi-build.c | 39 +++
hw/loongarch/virt.c
Hi,
On 7/11/22 23:47, Michael S. Tsirkin wrote:
pci,pc,virtio: features, tests, fixes, cleanups
lots of acpi rework
first version of biosbits infrastructure
ASID support in vhost-vdpa
core_count2 support in smbios
PCIe DOE emulat
On 15/11/22 14:06, Cédric Le Goater wrote:
Hello Peter,
On 11/14/22 20:08, Peter Delevoryas wrote:
I've been using this patch for a long time so that I don't have to use
dd to zero-extend stuff all the time. It's just doing what people are
doing already, right? I hope it's not controversial.
rflow is only
detected with an explicit -Wconversion.
Signed-off-by: Alex Bennée
Signed-off-by: Peter Maydell
---
hw/intc/arm_gic.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
user.
Use blk_check_size_and_read_all() instead of blk_pread() to improve
the reported error.
Signed-off-by: Cédric Le Goater
---
hw/block/m25p80.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
RAZ */
return 0;
+ }
Reviewed-by: Philippe Mathieu-Daudé
Cc'ing Jan/Cleber/Beraldo.
On 16/11/22 10:43, Thomas Huth wrote:
On 15/11/2022 12.13, Philippe Mathieu-Daudé wrote:
On 15/11/22 12:05, Thomas Huth wrote:
On 15/11/2022 12.03, Philippe Mathieu-Daudé wrote:
Hi,
As of v7.2.0-rc0 I am getting:
(101/198)
tests/av
On 16/11/22 11:58, Thomas Huth wrote:
On 16/11/2022 11.23, Philippe Mathieu-Daudé wrote:
Cc'ing Jan/Cleber/Beraldo.
On 16/11/22 10:43, Thomas Huth wrote:
On 15/11/2022 12.13, Philippe Mathieu-Daudé wrote:
On 15/11/22 12:05, Thomas Huth wrote:
On 15/11/2022 12.03, Philippe Mathieu-
74 ("target/ppc: Implement hashst and hashchk")
Hmm this is another fix... You could split your patch in 2,
but not a big deal. Regardless:
Reviewed-by: Philippe Mathieu-Daudé
On 16/11/22 16:20, Greg Kurz wrote:
Hi Vaibhav,
Nice to see some people are still building QEMU at IBM ;-)
On Wed, 16 Nov 2022 18:47:43 +0530
Vaibhav Jain wrote:
Kowshik reported that building qemu with GCC 12.2.1 for 'ppc64-softmmu'
target is failing due to following build warnings:
../
he recently assigned 'is_bridge' variable?
Otherwise:
Reviewed-by: Philippe Mathieu-Daudé
On 17/11/22 13:19, Alex Bennée wrote:
The boot_linux tests download and run a full cloud image boot and
start a full distro. While the ability to test the full boot chain is
worthwhile it is perhaps a little too heavy weight and causes issues
in CI. Fix this by dropping the TCG tests in boot_linu
esh| 2 +-
4 files changed, 14 insertions(+), 14 deletions(-)
rename .gitlab-ci.d/cirrus/{macos-11.vars => macos-12.vars} (74%)
Thanks!
Reviewed-by: Philippe Mathieu-Daudé
On 17/11/22 18:00, Conor Dooley wrote:
On Sat, Nov 12, 2022 at 01:34:15PM +, Conor Dooley wrote:
From: Conor Dooley
The system controller on PolarFire SoC is access via a mailbox. The
control registers for this mailbox lie in the "IOSCB" region & the
interrupt is cleared via write to the "
-tcs/virtio-spec/blob/master/virtio-gpu.tex#L343
Cc: Dongwon Kim
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu-base.c | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
bogus bits in txdw0.
Use a separate local variable for Tx Status and preserve Tx Descriptor
in txdw0.
Signed-off-by: Stefan Hajnoczi
---
hw/net/rtl8139.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
' is harder to miss if moved on the
next line just before the mask.
Reviewed-by: Philippe Mathieu-Daudé
-
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 17/11/22 17:55, Stefan Hajnoczi wrote:
v3:
- Add Patch 1 to avoid clobbering tx descriptor bits
- Add Patch 2 to avoid confusing tx command modes
- Exclude IP and TCP headers from large send MSS value
Stefan Hajnoczi (3):
rtl8139: avoid clobbering tx descriptor bits
rtl8139: keep Tx c
| 3 +
include/sysemu/accel-blocker.h | 56
5 files changed, 216 insertions(+), 1 deletion(-)
create mode 100644 accel/accel-blocker.c
create mode 100644 include/sysemu/accel-blocker.h
Reviewed-by: Philippe Mathieu-Daudé
On 18/11/22 08:32, Philippe Mathieu-Daudé wrote:
On 11/11/22 16:47, Emanuele Giuseppe Esposito wrote:
This API allows the accelerators to prevent vcpus from issuing
new ioctls while execting a critical section marked with the
Typo "executing".
accel_ioctl_inhibit_begin/end functi
+will ensure that patches touching a given subsystem will automatically
+be CC'd to you.
Although 'R:' tag means 'designated reviewer', such reviewers is
expected to provide regular spontaneous feedback. Otherwise being
subscribed to the list is sufficient.
Reviewed-by: Philippe Mathieu-Daudé
committed faster.
Less code centric:
"... you'll help make our task of contribution review easier and your
change is likely to be accepted and committed faster."
Anyhow,
Reviewed-by: Philippe Mathieu-Daudé
: Paolo Bonzini
Message-Id: <[email protected]>
---
docs/devel/submitting-a-patch.rst | 75 ---
1 file changed, 49 insertions(+), 26 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 16/11/22 09:43, Klaus Jensen wrote:
From: Klaus Jensen
Add the 'nmi-i2c' device that emulates an NVMe Management Interface
controller.
Initial support is very basic (Read NMI DS, Configuration Get).
This is based on previously posted code by Padmakar Kalghatgi, Arun
Kumar Agasar and Saurav
: Stefan Hajnoczi
Reviewed-by: Paolo Bonzini
Message-Id: <[email protected]>
---
docs/devel/submitting-a-patch.rst | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
27;pc-bios',
+ 'edk2-aarch64-code.fd'))
I am not sure about restricting to BUILD_DIR, I'd rather use an
externally prebuilt image, i.e.:
https://snapshots.linaro.org/components/kernel/leg-virt-tianocore-edk2-upstream/4710/QEMU-AARCH64/RELEASE_GCC5/
(I'd like to use these Avocado tests with a distrib provided QEMU
binary).
Anyhow can be fixed later, so:
Reviewed-by: Philippe Mathieu-Daudé
+++--
1 file changed, 7 insertions(+), 2 deletions(-)
Thanks for the update.
Reviewed-by: Philippe Mathieu-Daudé
relevant:
is also insufficient for running the test with a debug build
of QEMU: on my machine the tests take over 10 minutes to run
in that config.
Reviewed-by: Philippe Mathieu-Daudé
Push the timeout up to 720s so that the test definitely has
enough time to complete.
Signed-off-by: Peter
On 18/11/22 10:18, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
Cc: [email protected]
---
target/ppc/excp_helper.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 18/11/22 10:18, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
Cc: Philippe Mathieu-Daudé
Cc: Jiaxun Yang
---
hw/mips/mips_int.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 2db5e10fe0
On 18/11/22 10:18, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
Cc: Alistair Francis
Cc: Bin Meng
Cc: [email protected]
---
target/riscv/cpu_helper.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 18/11/22 10:18, Richard Henderson wrote:
In addition, use tcg_enabled instead of !kvm_enabled.
Signed-off-by: Richard Henderson
---
Cc: [email protected]
---
target/ppc/helper_regs.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
Reviewed-by: Philippe Mathieu
On 18/11/22 10:18, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
Cc: [email protected]
---
hw/ppc/ppc.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
turn val;
}
Reviewed-by: Philippe Mathieu-Daudé
On 21/11/22 10:55, Alex Bennée wrote:
Richard Henderson writes:
On 11/18/22 05:30, Alex Bennée wrote:
Richard Henderson writes:
Create a wrapper for locking/unlocking the iothread lock.
Signed-off-by: Richard Henderson
---
Cc: Paolo Bonzini (maintainer:Main loop)
You might want to rev
ay' + day + '.tar.xz')
+tar_url = ('https://qemu-advcal.gitlab.io'
+ '/qac-best-of-multiarch/download/day' + day + '.tar.xz')
You could insert the year in the url, so you can eventually add other
editions :)
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
| 14 +-
hw/hyperv/vmbus.c| 8 +++-
qga/commands-win32.c | 8 +++-
3 files changed, 11 insertions(+), 19 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
| 3 +--
hw/core/machine.c | 3 +--
hw/virtio/vhost-vdpa.c | 2 +-
iothread.c | 2 +-
monitor/qmp-cmds.c | 4 ++--
5 files changed, 6 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 21/11/22 09:50, Markus Armbruster wrote:
Signed-off-by: Markus Armbruster
---
include/io/channel.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
-compare.c | 13 -
target/i386/kvm/kvm.c| 5 +
util/thread-context.c| 10 ++
8 files changed, 21 insertions(+), 52 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Hi,
On 20/11/22 23:54, Shivam Kumar wrote:
Introduces a (new) throttling scheme where QEMU defines a limit on the dirty
rate of each vcpu of the VM. This limit is enfored on the vcpus in small
intervals (dirty quota intervals) by allowing the vcpus to dirty only as many
pages in these intervals
y: Richard Henderson
---
include/qemu/cpuid.h | 7 +++
util/bufferiszero.c | 3 +--
tcg/i386/tcg-target.c.inc | 11 ---
3 files changed, 12 insertions(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
++-
include/exec/cpu_ldst.h | 26 --
accel/tcg/cputlb.c | 104 +---
3 files changed, 59 insertions(+), 78 deletions(-)
Nice.
Reviewed-by: Philippe Mathieu-Daudé
+++-
tcg/tci.c| 127 ---
2 files changed, 26 insertions(+), 110 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
insertions(+), 405 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 21/11/22 15:36, Peter Maydell wrote:
On Mon, 21 Nov 2022 at 14:03, Markus Armbruster wrote:
Tweak the semantic patch to drop redundant parenthesis around the
return expression.
Coccinelle drops comments in hw/rdma/vmw/pvrdma_cmd.c; restored
manually.
Coccinelle messes up vmdk_co_create(),
| 15 ---
tcg/tcg.c| 4 ++--
tcg/aarch64/tcg-target.c.inc | 8 +---
tcg/tci/tcg-target.c.inc | 3 ++-
5 files changed, 33 insertions(+), 19 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
+--
1 file changed, 21 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 18/11/22 10:47, Richard Henderson wrote:
Split out a helper for choosing testb vs testl.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
case TCG_TYPE_I32:
+datahi = 0;
+break;
+case TCG_TYPE_I64:
+datahi = (TCG_TARGET_REG_BITS == 32 ? *args++ : 0);
+break;
+default:
+g_assert_not_reached();
+}
Reviewed-by: Philippe Mathieu-Daudé
= 0;
tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
+#ifdef _WIN64
+/* These are call saved, and not we don't save them, so don't use them. */
s/not//?
Reviewed-by: Philippe Mathieu-Daudé
+tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM6);
+tcg_regset_set_r
On 21/11/22 19:39, Peter Maydell wrote:
On Fri, 11 Nov 2022 at 18:35, Alex Bennée wrote:
This is simulating a bus master writing data back into system memory.
Mark it as such.
Signed-off-by: Alex Bennée
---
hw/audio/intel-hda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
I w
s(-)
Reviewed-by: Philippe Mathieu-Daudé
Cc'ing more UI/display contributors.
On 17/11/22 14:05, Peter Maydell wrote:
On Tue, 1 Nov 2022 at 14:17, Peter Maydell wrote:
Hi; I'm trying to find out what the UI layer's threading and
locking strategy is, at least as far as it applies to display
device models.
Ping! :-) I'm still lookin
On 21/11/22 16:34, Bernhard Beschow wrote:
Am 27. Oktober 2022 20:47:19 UTC schrieb "Philippe Mathieu-Daudé"
:
Linux kernel expects the northbridge & southbridge chipsets
configured by the BIOS firmware. We emulate that by writing
a tiny bootloader code in write_bootl
| 67
tcg/tcg.c| 4 +++
tcg/README | 10 --
14 files changed, 100 insertions(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 18/11/22 10:47, Richard Henderson wrote:
Notice when the host has additional atomic instructions.
The new variables will also be used in generated code.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 3 +++
tcg/aarch64/tcg-target.c.inc | 10 ++
2 files chang
On 22/11/22 00:10, Philippe Mathieu-Daudé wrote:
On 18/11/22 10:47, Richard Henderson wrote:
Notice when the host has additional atomic instructions.
The new variables will also be used in generated code.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 3 +++
tcg
On 18/11/22 10:47, Richard Henderson wrote:
Adding a vector type will make it easier to handle i386
have_atomic16 via AVX.
Signed-off-by: Richard Henderson
---
include/qemu/int128.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
/tcg.c | 58 ++
2 files changed, 30 insertions(+), 32 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
+}
Reviewed-by: Philippe Mathieu-Daudé
---
tcg/tcg-internal.h | 15 +++
1 file changed, 15 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 22/11/22 09:58, Markus Armbruster wrote:
Thomas Huth writes:
On 21/11/2022 17.32, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
On 21/11/22 15:36, Peter Maydell wrote:
On Mon, 21 Nov 2022 at 14:03, Markus Armbruster wrote:
Tweak the semantic patch to drop redundant
On 21/11/22 17:42, Max Filippov wrote:
On Mon, Nov 21, 2022 at 6:01 AM Markus Armbruster wrote:
.../xtensa/core-dsp3400/xtensa-modules.c.inc | 136 +-
target/xtensa/core-lx106/xtensa-modules.c.inc | 16 +--
These files are generated and were imported from xtensa configurat
On 22/11/22 14:49, Markus Armbruster wrote:
Cc: Fam Zheng
Cc: Kevin Wolf
Cc: Hanna Reitz
Cc: [email protected]
Signed-off-by: Markus Armbruster
---
block/vmdk.c | 28 +++-
1 file changed, 11 insertions(+), 17 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
coccinelle/return_directly.cocci
@@ -11,9 +11,8 @@ identifier F;
-T VAR;
... when != VAR
--VAR =
-+return
- E;
+-VAR = (E);
-return VAR;
++return E;
... when != VAR
}
Reviewed-by: Philippe Mathieu-Daudé
/* The CRB command buffer has its base address unaligned. */
+return true;
+}
Reviewed-by: Philippe Mathieu-Daudé
On 11/11/22 08:40, Richard Henderson wrote:
We copied all of the arguments in copy_op_nocheck.
We only need to replace the one argument that we change.
Signed-off-by: Richard Henderson
---
accel/tcg/plugin-gen.c | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 11/11/22 08:40, Richard Henderson wrote:
Better to re-use the existing function for copying ops.
Signed-off-by: Richard Henderson
---
accel/tcg/plugin-gen.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 11/11/22 08:40, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/tci.c| 1 -
tcg/tci/tcg-target.c.inc | 4
2 files changed, 5 deletions(-)
Since commit 7b7d8b2d9a ("tcg/tci: Use ffi for calls")?
Reviewed-by: Philippe Mathieu-Daudé
5 +
tcg/tcg.c | 34 ++
2 files changed, 23 insertions(+), 16 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Hi Richard,
Your "Move ffi_cif pointer into TCGHelperInfo" patch was
not obvious (to me) at first, so I split it in 3 trivial
patches.
Philippe Mathieu-Daudé (2):
tcg: Convert typecode_to_ffi from array to function
tcg: Factor init_ffi_layouts() out of tcg_context_init()
Richard
From: Richard Henderson
Instead of requiring a separate hash table lookup,
put a pointer to the CIF into TCGHelperInfo.
Signed-off-by: Richard Henderson
Message-Id: <[email protected]>
[PMD: Split from bigger patch]
Signed-off-by: Philippe Mathieu
In the unlikely case of invalid typecode mask, the function
will abort instead of returning a NULL pointer.
Signed-off-by: Richard Henderson
Message-Id: <[email protected]>
[PMD: Split from bigger patch]
Signed-off-by: Philippe Mathieu-Daudé
---
tcg
Signed-off-by: Richard Henderson
Message-Id: <[email protected]>
[PMD: Split from bigger patch]
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/tcg.c | 83 +--
1 file changed, 44 insertions(+), 39 del
On 22/11/22 17:54, Richard Henderson wrote:
On 11/22/22 03:30, Philippe Mathieu-Daudé wrote:
On 11/11/22 08:40, Richard Henderson wrote:
Add a helper function for computing the size of a type.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 16
tcg/tcg.c
On 18/11/22 10:47, Richard Henderson wrote:
Adding a vector type will make it easier to handle i386
have_atomic16 via AVX.
Signed-off-by: Richard Henderson
---
include/qemu/int128.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/qemu/int128.h b/include
On 22/11/22 19:21, Philippe Mathieu-Daudé wrote:
On 18/11/22 10:47, Richard Henderson wrote:
Adding a vector type will make it easier to handle i386
have_atomic16 via AVX.
Signed-off-by: Richard Henderson
---
include/qemu/int128.h | 10 +-
1 file changed, 5 insertions(+), 5
();\
+ _iothread_lock_auto.iterate; \
+ _iothread_lock_auto.iterate = false)
Nice, thanks!
Reviewed-by: Philippe Mathieu-Daudé
On 23/11/22 02:23, Xiaojuan Yang wrote:
Add cfi01 pflash device for LoongArch virt machine
Signed-off-by: Xiaojuan Yang
---
hw/loongarch/Kconfig| 1 +
hw/loongarch/acpi-build.c | 18 +
hw/loongarch/virt.c | 80 -
include/hw/loo
On 18/11/22 12:33, Alex Bennée wrote:
The old URL wasn't stable. I suspect the current URL will only be
stable for a few months so maybe we need another strategy for hosting
rootfs snapshots?
Signed-off-by: Alex Bennée
---
tests/avocado/boot_linux_console.py | 4 ++--
1 file changed, 2 inser
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