Signed-off-by: Simon Law <[email protected]> --- docs/system/riscv/k230.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/docs/system/riscv/k230.rst b/docs/system/riscv/k230.rst index cea8202e55..dd50b0bd2e 100644 --- a/docs/system/riscv/k230.rst +++ b/docs/system/riscv/k230.rst @@ -18,9 +18,31 @@ The ``k230`` machine supports the following devices: * 1 c908 cores (little core) * Core Local Interruptor (CLINT) * Platform-Level Interrupt Controller (PLIC) +* Clock Management Unit (CMU) * 2 K230 Watchdog Timer * 5 UART +Clock Management Unit +--------------------- + +The CMU model provides the register interface used by the K230 SDK U-Boot and +the upstream Linux K230 clock driver. It implements the four PLL register +blocks at ``0x91102000`` through ``0x9110203f`` and the defined sysclk +registers in the ``0x91100000`` window, including the software-visible +``SPI2AXI_CLK_DIV`` register at offset ``0x108``. + +The model implements reset values, writable and reserved bits, PLL control +write-enable semantics, and write-one-to-trigger update operations. PLL lock +and init completion are deterministic and immediate so that Linux clock probe +does not depend on virtual time. + +The CMU does not propagate clock frequencies to QEMU devices or alter CPU +execution speed. Peripheral reset, power control, and a guest-initiated K230 +system-reset backend are separate hardware blocks and are not modeled by the +CMU. Consequently, a guest reboot requires the future K230 reset subsystem +and matching OpenSBI reboot backend; QMP ``system_reset`` resets the CMU along +with the rest of the machine. + Boot options ------------ The ``k230`` machine supports K230 SDK boot through M-mode U-Boot, which then -- 2.43.0
