On 15/8/26 22:37, Richard Henderson wrote:
Expand the interfaces to allow an address within a range to be tested.
Additionally, where was an edge case of size == 0 which was ambiguous,
and is now eliminated.
Only change the functional interface. Where required by the callee,
rebuild "size = last - addr + 1" locally.
Signed-off-by: Richard Henderson <[email protected]>
---
include/accel/tcg/cpu-ops.h | 16 ++++++++++++----
target/alpha/cpu.h | 2 +-
target/arm/internals.h | 5 +++--
target/avr/cpu.h | 2 +-
target/hppa/cpu.h | 5 +++--
target/i386/tcg/helper-tcg.h | 2 +-
target/loongarch/tcg/tcg_loongarch.h | 2 +-
target/m68k/cpu.h | 2 +-
target/microblaze/cpu.h | 2 +-
target/mips/tcg/tcg-internal.h | 2 +-
target/or1k/cpu.h | 2 +-
target/ppc/internal.h | 2 +-
target/riscv/cpu.h | 2 +-
target/s390x/s390x-internal.h | 2 +-
target/sh4/cpu.h | 2 +-
target/sparc/cpu.h | 2 +-
target/tricore/cpu.h | 2 +-
target/xtensa/cpu.h | 2 +-
accel/tcg/cputlb.c | 7 +++----
target/alpha/helper.c | 2 +-
target/arm/tcg/tlb_helper.c | 5 +++--
target/avr/helper.c | 2 +-
target/hexagon/cpu.c | 8 +++++---
target/hppa/mem_helper.c | 6 ++++--
target/i386/tcg/system/excp_helper.c | 2 +-
target/loongarch/tcg/tlb_helper.c | 3 ++-
target/m68k/helper.c | 3 ++-
target/microblaze/helper.c | 2 +-
target/mips/tcg/system/tlb_helper.c | 2 +-
target/or1k/mmu.c | 2 +-
target/ppc/mmu_helper.c | 2 +-
target/riscv/tcg/cpu_helper.c | 3 ++-
target/rx/cpu.c | 2 +-
target/s390x/tcg/excp_helper.c | 2 +-
target/sh4/helper.c | 2 +-
target/sparc/mmu_helper.c | 4 ++--
target/tricore/helper.c | 2 +-
target/xtensa/helper.c | 2 +-
38 files changed, 68 insertions(+), 51 deletions(-)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 0ddd898e6e..bfcd9b6159 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -666,11 +666,13 @@ static const char *access_type_names[] = { "MMU_DATA_LOAD ",
"MMU_DATA_STORE",
static const char *mmu_idx_names[] = { "MMU_USER_IDX", "MMU_GUEST_IDX",
"MMU_KERNEL_IDX" };
-static bool hexagon_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx, bool
probe,
- uintptr_t retaddr)
+static bool hexagon_tlb_fill(CPUState *cs, vaddr address,
+ vaddr first, vaddr last,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr)
{
CPUHexagonState *env = cpu_env(cs);
+ int size = last - address + 1;
Nitpicking, since we know last >= first, could we use size_t instead?
Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
int slot = 0;
hwaddr phys;
int prot = 0;
